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Vázquez, J.; Carrasco, R.; Ortegón, J.; Castillo, A.; Rocha Gaso, MI.; Cabañas, V. (2018). Hardware design of computer arithmetic blocks for engineering laboratory practices. IEEE Latin America Transactions. 16(6):1610-1615. https://doi.org/10.1109/TLA.2018.8444156
Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/192551
Título: | Hardware design of computer arithmetic blocks for engineering laboratory practices | |
Autor: | Vázquez, J. Carrasco, R. Ortegón, J. Castillo, A. Cabañas, V. | |
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[EN] This work presents a set of laboratory experiments that can be carried out by students who are taking digital design courses in engineering programs like Electronics, Communications Systems and Mechatronics. The purpose ...[+]
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Derechos de uso: | Reserva de todos los derechos | |
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Versión del editor: | https://doi.org/10.1109/TLA.2018.8444156 | |
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