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Parametric Timing Analisys and Its Appication to Dynamic Voltage Scaling

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Parametric Timing Analisys and Its Appication to Dynamic Voltage Scaling

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Mohan, S.; Mueller, F.; Root, M.; Hawkins, W.; Healy, C.; Whalley, D.; Vivancos Rubio, E. (2011). Parametric Timing Analisys and Its Appication to Dynamic Voltage Scaling. ACM Transactions on Embedded Computing Systems. 10(2):1-34. doi:10.1145/1880050.1880061

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/30308

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Title: Parametric Timing Analisys and Its Appication to Dynamic Voltage Scaling
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Sistemas Informáticos y Computación - Departament de Sistemes Informàtics i Computació
Issued date:
Abstract:
Embedded systems with real-time constraints depend on a priori knowledge of worst-case execution times (WCETs) to determine if tasks meet deadlines. Static timing analysis derives bounds on WCETs but requires statically ...[+]
Subjects: Algorithms , Experimentation , Real-time systems , Worst-case execution time , Timing analysis , Dynamic voltage scaling
Copyrigths: Cerrado
Source:
ACM Transactions on Embedded Computing Systems. (issn: 1539-9087 )
DOI: 10.1145/1880050.1880061
Publisher:
Association for Computing Machinery (ACM)
Publisher version: http://dx.doi.org/10.1145/1880050.1880061
Thanks:
This work was conducted at North Carolina State University and Florida State University; it was supported in part by NSF grants CCR-0208581, CCR-0310860, CCR-0312695, EIA-0072043, CCR-0208892, CCR-0312493 and CCR-0312531.[+]
Type: Artículo

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