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High-Throughput Interpolator Architecture for Low-Complexity Chase Decoding of RS Codes

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High-Throughput Interpolator Architecture for Low-Complexity Chase Decoding of RS Codes

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García Herrero, FM.; Canet Subiela, MJ.; Valls Coquillat, J.; Meher, PK. (2012). High-Throughput Interpolator Architecture for Low-Complexity Chase Decoding of RS Codes. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20(3):568-573. doi:10.1109/TVLSI.2010.2103961

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/35462

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Title: High-Throughput Interpolator Architecture for Low-Complexity Chase Decoding of RS Codes
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Ingeniería Electrónica - Departament d'Enginyeria Electrònica
Universitat Politècnica de València. Instituto Universitario de Telecomunicación y Aplicaciones Multimedia - Institut Universitari de Telecomunicacions i Aplicacions Multimèdia
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Abstract:
In this paper, a high-throughput interpolator architecture for soft-decision decoding of Reed-Solomon (RS) codes based on low-complexity chase (LCC) decoding is presented. We have formulated a modified form of the Nielson's ...[+]
Subjects: Algebraic soft-decision decoding , Interpolation , Low-complexity chase (LCC) , Low latency , Nielson's algorithm , Reed-Solomon (R-S) codes
Copyrigths: Cerrado
Source:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. (issn: 1063-8210 )
DOI: 10.1109/TVLSI.2010.2103961
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Publisher version: http://dx.doi.org/10.1109/TVLSI.2010.2103961
Thanks:
This work was supported by FEDER and the Spanish Ministerio de Ciencia e Innovacion, under Grant TEC2008-06787.
Type: Artículo

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