Hardware design of a modular multilevel statcom

Abstract

Consulta en la Biblioteca ETSI Industriales (Riunet)

[EN] The aim of this work is to provide an experimental platform of a Single-Delta Bridge-Cell based STATCOM, and get familiar with its functions as follows: 1. Introduction to STATCOMs and their possible applications; get familiar to the state-of-the-art. 2. Construction and simulation of a SDBC model. 3. Hardware designing of the 3 basic parts: inverter submodule, measurement circuitry, and control board. 4. Testing the boards. According to the proposed objectives, this thesis is divided into 3 main chapters. Chapter 2 begins with introducing the Modular Multilevel Cascade Converter family, presenting a brief summary of each one of the di erent topologies. Af- terwards it is described the operation principle of a Single Delta Bridge Cell; and nally it is purposed a mathematical model of the converter, and a MatLAB Simulink model. Chapter 3 leads into the physic part, and main part in which is focused this project: the hardware design. It is divided into 3 di erent designs, each one of them related to one basic part of the whole project, that is: submodule design, measurement board design, and control board design (FPGA and DSP). Eventually, in chapter 4 are presented the simulation results of the model de- scribed in point 2.4 and the testing of the boards designed.