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Addressing fairness in SMT multicores with a progress-aware scheduler

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Addressing fairness in SMT multicores with a progress-aware scheduler

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Feliu Pérez, J.; Sahuquillo Borrás, J.; Petit Martí, SV.; Duato Marín, JF. (2015). Addressing fairness in SMT multicores with a progress-aware scheduler. IEEE. doi:10.1109/IPDPS.2015.48

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/64733

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Title: Addressing fairness in SMT multicores with a progress-aware scheduler
Author:
UPV Unit: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors
Issued date:
Abstract:
Current SMT (simultaneous multithreading) processors co-schedule jobs on the same core, thus sharing core resources like L1 caches. In SMT multicores, threads also compete among themselves for uncore resources like the LLC ...[+]
Subjects: Scheduling , Fairness , SMT , Multicore , Performance estimation
Copyrigths: Reserva de todos los derechos
ISBN: 978-1-4799-8648-4
Source:
(issn: 1530-2075 )
DOI: 10.1109/IPDPS.2015.48
Publisher:
IEEE
Publisher version: http://dx.doi.org/10.1109/IPDPS.2015.48
Conference name: 29th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2015)
Conference place: Hyderabad, India
Conference date: May 25-29, 2015
Description: © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Thanks:
This work was supported by the Spanish Ministerio de Econom´ıa y Competitividad (MINECO) and Plan E funds, under Grant TIN2012-38341-C04-01, and by the Intel Early Career Faculty Honor Program Award
Type: Comunicación en congreso

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