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Hardware architecture of a gaussian noise generator based on inversion method

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Hardware architecture of a gaussian noise generator based on inversion method

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Gutiérrez, RG.; Torres Carot, V.; Valls Coquillat, J. (2012). Hardware architecture of a gaussian noise generator based on inversion method. IEEE Transactions on Circuits and Systems II: Express Briefs. 59(8):501-505. doi:10.1109/TCSII.2012.2204119

Por favor, use este identificador para citar o enlazar este ítem: http://hdl.handle.net/10251/35284

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Title: Hardware architecture of a gaussian noise generator based on inversion method
Author: Gutiérrez, Roberto G. Torres Carot, Vicente Valls Coquillat, Javier
UPV Unit: Universitat Politècnica de València. Departamento de Ingeniería Electrónica - Departament d'Enginyeria Electrònica
Universitat Politècnica de València. Instituto Universitario de Telecomunicación y Aplicaciones Multimedia - Institut Universitari de Telecomunicacions i Aplicacions Multimèdia
Issued date:
Abstract:
In this brief, we present a hardware-based Gaussian noise generator (GNG) with low hardware cost, high generation rate, and high Gaussian tail accuracy. The proposed generator is based on a piecewise polynomial approximation ...[+]
Subjects: Additive white Gaussian noise (AWGN) , Inversion method , Piecewise polynomial approximation , Additive White Gaussian noise , Gaussian tails , Generation rate , Hardware architecture , Hardware resources , Inverse cumulative distribution functions , Inversion methods , Low hardware costs , Random noise , Random number generators , Random sequence , Virtex-II device , Hardware , Polynomial approximation , Random number generation , Statistical tests , White noise , Gaussian noise (electronic)
Copyrigths: Cerrado
Source:
IEEE Transactions on Circuits and Systems II: Express Briefs. (issn: 1549-7747 )
DOI: 10.1109/TCSII.2012.2204119
Publisher:
Institute of Electrical and Electronics Engineers (IEEE)
Publisher version: http://dx.doi.org/10.1109/TCSII.2012.2204119
Project ID:
info:eu-repo/grantAgreement/MICINN//TEC2008-06787/ES/ARQUITECTURAS DE FEC PARA SISTEMAS DE COMUNICACIONES DE MUY ALTA VELOCIDAD/
info:eu-repo/grantAgreement/MINECO//TEC2011-27916/ES/ALGORITMOS Y ARQUITECTURAS DE FEC PARA FUTUROS SISTEMAS DE COMUNICACIONES/
Thanks:
This work was supported by Fondo Europeo de Desarrollo Regional and the Spanish Ministerio de Ciencia e Innovacion under Grant TEC2008-06787 and Grant TEC2011-27916. This brief was recommended by Associate Editor Y. Ha.
Type: Artículo

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